Future many-core computer architectures present two emerging trends; a move from general purpose cores to specialized cores, and a need for Operating System (OS) designs that embrace heterogeneity. Proposed many-core OS architectures have focused on performance and scalability, however few have considered how we can provided security extensions that can provide cross-processor protection domains.
In this work, we propose a design for many-core, heterogeneous systems that introduces architectural security primitives to allow the security extensions to be implemented in software. Our goal is to provide a general set of hardware primitives that are available on all processing elements in the system, and a specification of implementing memory tagging and trusted execution security extensions in software. We focus our implementation on the RISC-V architecture, using emulation when required for heterogenous cores.